Vivado EDA

Controls Xilinx Vivado for FPGA development with synthesis, implementation, bitstream generation, and automated diagnostic tools.

Provides 21 tools for controlling Xilinx Vivado EDA through Tcl command execution, covering the complete FPGA development workflow. Includes session management, project creation, synthesis, implementation, and bitstream generation with automatic critical warning diagnostics. Features IO pin verification against XDC constraints, IP parameter inspection, XCI configuration comparison, and structured timing and utilization reports.